DAC1220E

The output voltage range of the DAC1220 is nominally 0V to 2×VREF. The digital lines operate at TTL-compatible CMOS logic levels and can be driven from 3.3V logic sources. The output is not fully linear to the rails; maximum linearity is specified from (AGND+20mV) to (AVDD-20mV). For linearity from 0-5V, AVDD can be increased to 5.02V or more.

The DAC1220 uses delta-sigma technology to achieve inherently linear voltage output performance in a small package at very low power.

The resolution of the DAC1220 can be programmed to 20 bits for Full-Scale, settling to 0.003% within 15ms. The maximum linearity error is ±0.0015% typical, or 16 bits for Full-Scale, settling to 0.012%. On-chip calibration within 2ms max. The output range is two times the external reference voltage.