In the actual application circuit, this chip will produce obvious noise. The capacitance can be reduced by adjusting the capacitance between CAP+ and CAP-, but the voltage will also change with the capacitance. Q: Is there any suitable way to eliminate the noise.
Marquis 發表於 July 2, 2020
You can try a resistor in parallel.
Ciaran 發表於 July 2, 2020
Sensitive to power supply ripple, no solution for common solutions, increase the power supply voltage to 5.5V, and then add low dropout LDO to output 5V.
Gillian 發表於 July 2, 2020
Try to improve the resistance of 2 feet and 4 feet with the ground.
