RFQ/BOM 0 登錄 / 註冊

選擇您的位置

用戶形象

Capacitor charging and discharging problems.

Hardware design
8月 25, 2020 by Jinny 622

As shown in the figure, 12v DC and 0-3V square wave pass through a simple resistance capacitor circuit to output a 6.5-9.5V square wave signal.

And the output signal amplitude can be adjusted by adjusting the lower resistance.

I want to know, what is the principle of intermediate output? Thank you all

TIM截图20180330104309.png

所有評論

user image

Femke 發表於 August 25, 2020

The value of VF2 is the divided voltage of R1 and R2 to 12V DC VS1, and then the square wave of VG1 is superimposed on the DC blocking capacitor.

0
user image

Veasna 發表於 August 25, 2020

6.5+9.5=16/2=8. That is, R1 and R2 are divided into 8V DC, and the upper and lower 3/2=1.5 amplitude square wave fluctuations.

0
  • Jinny

    Jinny 發表於 August 25, 2020

    Why doesn't capacitor C1 charge and discharge VG1? I mean the output voltage of VF2 is: capacitor charge and discharge curve superimposed on DC bias 8V. Please guide, thanks!

  • 您需要登錄才能回覆。 登錄 | 註冊

user image

Pocahontas 發表於 August 25, 2020

Capacitance is [through pass through]

0

寫一個答案

您需要登錄才能回覆。 登錄 | 註冊